DSC POWER 864 - REV2 Spécifications Page 75

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© 2009 Microchip Technology Inc. Preliminary DS39927B-page 73
PIC24F16KA102 FAMILY
REGISTER 8-7: IFS3: INTERRUPT FLAG STATUS REGISTER 3
U-0 R/W-0, HS U-0 U-0 U-0 U-0 U-0 U-0
—RTCIF
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 7 bit 0
Legend: HS = Hardware Settable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as0
bit 14 RTCIF: Real-Time Clock and Calendar Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 13-0 Unimplemented: Read as0
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